Introduction
Andy Grove, Albert Yu and Pat Gelsinger.
Shortly before arrival on your flight to Palm Springs, California, one has the uneasy feeling that Intel has transported you into the desert. It’s only when you’ve actually touched down that you realize what Palm Springs really is. The town, located on an oasis and originally Cahuilla Indian territory, is surrounded by 3,000 meter high mountains – some of which even have ski resorts. This was the last time that Palm Springs was the scene of the Intel developer Forum (IDF) which will move back to the Silicon Valley homelands (to be more precise: San Jose) in the future.
The event began with the keynote of ex-CEO Andy Grove who has obviously still not fully recovered from his long bout of illness. After a long speech concerning the re-orientation of the company in the direction of the Internet and networking (financial analysts love this patter because it’s still in fashion), good old Andy reverted to the ‘original’ core business: processors. And then things speeded up dramatically. Together with Dr. Albert Yu, he presented not only a 1 GHz Pentium III, but Yu also went to demonstrate a Willamette processor apparently running at 1.5 GHz on a separate machine.
Let’s take a look at the facts. The gigahertz Pentium III was compared with its 533 MHz predecessor using a benchmark. A secondary tool invoked a calculation-intensive process, namely the conversion of a video into MPEG-2 format. And then came the big ‘aha!’ effect: the gigahertz processor was about twice as fast as the 533 MHz processor. At least this presentation had one convincing argument in its favor: the comparison was made with the help of the well-established application Ligos LSX. In their chase for impressive headlines, Intel didn’t take a backseat. In their first presentation of the Willamette processor (alias Pentium IV), Intel apparently preferred to flex its muscles rather than convince Tom’s Hardware. The air-cooled Willamette chip, hidden from the eyes of the public in its sealed PC case was apparently clocked at 1.5 GHz. At least that’s what the Intel Frequency ID utility displayed. Note that the utility is a proprietary product of Intel and not a frequency checker that we use and respect as such. Albert Yu, who admitted that the test object was ‘first silicon’, started a 3D graphics demo and whispers flew through the rows of reporters and analysts who were less familiar with the technical possibilities. At least Intel was successful in one respect: they out-maneuvered AMD again.
The Willamette (Pentium IV)
Named after a river in Oregon, Intel presents the Willamette, successor to the Pentium III. It fits in the new 423 socket. Source: Thanks to Daniel “Mr. Big Guy” Wolff of Chip Magazine who pushed CNN and ZDTV crews away and who shoot this picture before being lynched.
‘Back to the sockets’ is Intel’s strategy to produce low-cost high-frequency processors such as the Willamette Pentium IV. Let’s think back to Spring 1997. AMD’s K6 and Intel’s Pentium MMX processors used the same chipsets and sockets. With the appearance of the Pentium II Klamath, Intel deemed it necessary to move away from sockets and into Slot 1 technology. Since then, all the ensuing CPU’s of both manufacturers have required their own chipsets and connectors. Intel’s objective to escape from the common platform had been reached. Sunlin Chou, Vice President and General Manager of Intel’s Technology and Manufacturing Group, sees the future of new desktop processors in sockets again. The Pentium III (Coppermine), Pentium IV (Willamette) and Timna are to be implemented as socketed FC-PGA versions.
Two important differences exist. The base material of the packaging of the silicon chip is no longer ceramic, instead it is an organic substrate. This improves the dielectrical and thermal properties. In addition, flip-chip technology will be used rather than wire bonding.
Willamette Functionality
So what new features does the Willamette processor offer? Right from the start: the Willamette is still a 32 bit CPU and is intended to make its debut appearance at the end of the year with a clock speed of 1.4 GHz. Its similarity to the P6 core, which has been in existence since the Pentium Pro, is only rudimentary. Intel has incorporated interesting features in what will probably be the company’s last 32 bit generation processor. Although the system bus is physically clocked at 100 MHz, the use of ‘Quad Pump’ technology increases the data transmission rate effectively to 3.2 GBytes/s. This is an increase of factor four in comparison with a Pentium III with a 133 MHz FSB and so it’s as if the bus was clocked at 400 MHz. Similar tricks are known practice from DDR-II memories, AGP 4x and the Athlon EV6 bus; it simply means that more data is transmitted per clock cycle.
Intel declined to comment on the size of the L2 cache at this time. When I asked Albert Yu how much L2 cache memory the Willamette incorporated, he answered that he did not know. His brain had a ‘memory problem’. An Intel employee later commented that he had known Albert Yu for several years and Albert had never had a ‘memory problem’. 🙂
The actual core of the Willamette has been subject to a general overhaul:
- The Arithmetic Logical Unit (ALU) is clocked at twice the processor speed. Example: when the processor is clocked at 1.5 GHz, the ALU will be clocked at 3.0 GHz.
- Hyper Pipelined Technology. In comparison to a Pentium III the pipeline depth is now 20 levels instead of 10. At higher frequencies, this technology will be effectively scaled up.
- Intel has resized the floating point and multimedia engine to a 128 bit unit. Beyond this, the Streaming SIMD Extensions 2 have been introduced. The following table shows the changes clearly:
MMX SIMD SIMD 2 Integer 64 Bit 64 Bit 128 Bit Floating Point – Single (4×32 Bit) Double (2×64 Bit)
Tehama: Intel rules the 400 MHz bus with a strict hand
In a further attempt to extend its monopolistic position, Intel has pushed the chipset business. Didn’t Andy Groves’ keynote speech mention something about Intel’s reorientation as an Internet and networking company?
And then the Tehama shocker arrives on the scene: Intel has accused the third party chipset manufacturer VIA Technologies of breach of contract. VIA allegedly activated the 133 MHz system bus in its Apollo Pro 133A chipset. Apparently, VIA should be satisfied with only 100 MHz although this would mean that the resulting products would yield lower performance. Whatever the case, Intel cancelled the license agreement. For VIA, future opportunities with the Willamette don’t look too good. It is highly unlikely that VIA will ever get a license agreement for the Willamette. The second possible candidate ALI doesn’t have any say in this scenario anyway.
Dirty Tricks: Rambus and the Stock Exchange
Intel’s current roadmap, which was presented before the IDF, mentions an ‘aggressive ramp-up’ for Rambus memory (RDRAM). It’s therefore not surprising that the one-and-only chipset Tehama supports this over-expensive memory type. That’s the end of inexpensive SDRAM. Just before the IDF, the price of Rambus Inc. stock suddenly climbed. Intel outlined its future strategy for memory chips during the keynote: Rambus will be given preference over standard SDRAM. In a CNN interview, Intel confirmed once more that Tehama, the only chipset for the Willamette processor, will only support RDRAM. My personal impression of the reaction of certain ‘analysts’ in the press room was negative to say the least. That very same day they grabbed Rambus stock and recommended the same to their buddies. The stock rating of Rambus Inc. doubled within a short space of time – a real ‘ramp-up’. To my mind, Intel was not fully aware of the consequences of this announcement, or were they? Let’s not forget that the processor manufacturer has heavily invested in Rambus Inc.
The IA-64 Itanium for Servers/Workstations
On the lower side of this Itanium CPU you can see the power connections, the lower half shows the pins for the socket connections and on top the PCB under which the L3 cache modules are located. The connection is named PAC418.
Nothing for price-sensitive home users – that’s the message. Intel’s first 64 bit CPU ‘Itanium’ (previously code-named ‘Merced’) has been especially designed for servers and workstations and will be launched in late Fall in a 733 MHz version. Intel intends to follow it with an 800 MHz version at the end of the year. The Itanium is supported by the 460GX chipset, which can coordinate a maximum of four Itaniums simultaneously. Corresponding motherboards will utilize both sides of the board for a pair of CPU’s (2×2) for this configuration. Maximum performance for these systems can only be expected where the operating system and applications have been ported to 64 bits. Intel has already invested in this area in order to ensure a successful introduction to the market. By the way, the 460GX works with DDR-SDRAM memories. That’s right – SDRAM! When queried on this, the devious Albert Yu stated “we take account of our customers requirements”. In other words: the use of Rambus memory would drive the cost of a server into the sky because servers or workstations are generally fitted with more memory than the 128 MB of an everyday consumer PC. Configurations using more than 1 GByte of RAM are not so uncommon. This decision is at least logical.
Political Decisions
The previous section proves that Intel is capable of making politically debatable decisions. It appears that the move to RDRAM is a fixed issue in the minds of the chipset manufacturers of consumer PC’s. The i820/i840 transitional solutions on offer that use Memory Translator Hubs (MTH) are – to say the least – useless. Dell, Compaq and Hewlett-Packard all reported problems when SDRAM memories were used with Error Correction Coding (ECC).
MTH was actually supposed to conduct an error-free translation of the RDRAM transmission protocol into SDRAM language in order to offer an inexpensive alternative to the expensive RDRAM solution. The entire dilemma wouldn’t have been half as bad if RDRAM was at the same price level as SDRAM, but no-one is prepared to pay six times the price for a negligible performance advantage. I am personally open to new memory technologies such as DDR-SDRAM or RDRAM – just as long as the price-to-performance ratio fits, but that just isn’t the case at this time.
Foster with Colusa Chipset
Let’s switch gear and go back to the 32 bit architecture (IA-32) again. The direct Pentium III Xeon successor is currently code-named ‘Foster’. At this point in time, we have very little information about this CPU. It can be assumed that the Foster will be positioned in the Xeon price range. As it is intended to introduce the Foster to the market in a 1.4 GHz version (like the Willamette Pentium IV), it is obvious that this server processor will use the core of the Willamette. It is theoretically possible to use up to four of these processors in a multi-processor configuration, however, at kickoff time it will only be possible to use two processors simultaneously because Intel’s Colusa chipset can’t handle more than two Foster CPU’s. Quad processor configurations can however be expected from third party manufacturers. Intel intends to supply the Forster in a PGA603 package (apparently 603 pins). Perhaps this processor will be named Pentium IV Xeon in the future. 🙂
The Low-Cost Timna CPU
PC users who are satisfied with average performance can go for the Timna processor from the end of this year. This low-cost chip unifies the CPU, graphics and the complete Northbridge unit of a standard chipset. From the outside, the Timna looks just like the socketed Pentium III or the Willamette. All three CPU’s are delivered in a green FC-PGA package. The picture above shows the Intel design research project “Cape Arago”. The Timna could be used with this mini PC which will cost under $600. The Timna will be released onto the market with a clock speed of 600 MHz. However, don’t expect great gaming performance from a Timna PC. It can however, serve well as an inexpensive typewriter with Internet access. My personal opinion: it’s not for the power freaks who dominate at Tom’s Hardware.
AMD’s 1.1 GHz Counter Offensive from Dresden
AMD, the archrival was not officially represented at the IDF. Despite this, the manufacturer defiantly used the opportunity to present its new Athlon at 1.1 GHz and standard air cooling technology – naturally in a different hotel. In comparison to the ‘old’ Athlon with a K7 core, the new Athlon uses the Thunderbird core (K75) with integrated full-speed cache. Just as Intel, AMD has reverted to socket technology again. The Thunderbird Athlon will be available from the second half of the year in Slot A and Socket A versions. The current pendant to the Celeron, the K6-2+ will be superseded by the Spitfire in late Summer. The Spitfire is also based on the K75 core, but will only be available as a Socket A version on the market.
AMD’s chipset front also has news to be reported. AMD is currently developing the AMD760, the follow-up to the AMD750/Irongate. This chipset should appear simultaneously with the Thunderbird. Its functionality is exemplary: the EV6 system bus speed will be increased from 200 to 266 MHz. The 760’s will support AGP 4x and DDR-SDRAM (Double Data Rate) up to 266 MHz.
From a strategic perspective, the development of proprietary chipsets is a decisive factor for the marketing of a new CPU. Until now, AMD preferred to outsource the production of chipsets to third party manufacturers such as VIA Technologies. However, the said manufacturer didn’t always excel with good timing. For example, the delivery of the KX133 chipset for the Athlon only started this month – six months too late. Also, the development work for the Thunderbird has been pushed aside at VIA because it would seem that Intel is more important to the Taiwanese. Unfortunately, the Athlon Thunderbird chipset KZ133 only supports PC-133 memory.
Serial ATA
When this year is over the old ATA100 standard (also known as UDMA/100) for the parallel transmission of data for hard disks and CD-ROM’s can be buried. The successor will be the Serial ATA standard. As the name implies, data transmission is serial. The individual hard disks using Serial ATA are connected using a four-wire cable. A standardized connector will be used for all drive types, i.e. 5.25″, 3.5″ and the 2.5″ notebook versions. Two wires transmit the data for writes and the other two are used for reads. As Serial ATA is a direct connection (point-to-point connection) type, jumper settings such as Master and Slave will no longer be needed in the future. For compatibility reasons, adapters are intended to be made available for a transition period so that old hard disks can still be used. The serial ATA 1x standard (from 2001) permits a maximum data transmission rate of 1.5 GBits/s (approx. 150 MByte/s).
USB 2.0
It somehow seems a little strange; next to Rambus memory and Serial ATA, USB 2.0 is the third standard that uses a serial transmission protocol and is being pushed by Intel. There was nothing to hear about IEEE1394/Firewire. Intel’s new favorite for external peripheral devices is USB 2.0. Compared with the old standard USB 1.1, the new USB 2.0 standard offers a bandwidth that is 40 times higher, a maximum of 480 MBits per second. The new standard should be downwards-compatible to USB 1.1 with its 12 MBits per second. For this reason, the connectors for both standards look the same.
At the IDF, a scanner was demonstrated that used USB 2.0 and a printer that used the old USB 1.1 standard. Both peripheral devices were connected to the same bus and worked perfectly well. The first chipset that is expected to be USB 2.0 compatible is the Solano (i815).
The Graphics Scene
After a full round of Intel presentations, lab sessions and workshops, every reporter needs a little time to think things over and exchange information. Here, interestingly enough, I learned that ATI has taken a different approach to the handling of print and online media. Although Tom’s Hardware was asked right from the start to sign an NDA, the responsible ATI employee’s remained lips remained practically sealed. We will not be able to say how many parallel rendering pipelines the Fury 6C will have until the beginning of March.
Nvidia’s NV 15 project is not yet ready for the eyes of the public yet. The same applies to S3’s Savage 2000+ graphics chip and the GX4-C. Despite this, there are some interesting points to report on from ATI and S3:
This picture shows a version of the Viper II from S3/Diamond which corresponds to the FlexATX form factor. ATI showed us a similar model. Just the size of the 3D chip (under the black heat sink) allows you to recognize the small height requirement of such graphics boards.