The New Processor Bus
The first new feature seen by code or data as it enters Pentium 4 is the new system bus. The well-known 'FSB' of Pentium 3 is clocked at 133 MHz and able to transfer 64-bit of data per clock, offering a data bandwidth of 8 byte * 133 million/s = 1,066 MB/s. Pentium 4's system bus is only clocked at 100 MHz and also 64-bit wide, but it is 'quad-pumped', using the same principle as AGP4x. Thus it can transfer 8 byte * 100 million/s * 4 = 3,200 MB/s. This is obviously a tremendous improvement that even leaves AMD's recently '
The new bus of Pentium 4 enables it to exchange data with the rest of the system faster than any other x86-processor, thus removing one important bottleneck that Pentium 3 was suffering from. However, the fastest processor bus doesn't help much unless the system's main memory can deliver data at an according pace. Intel's new 850 chipset for Pentium 4, which currently represents the only chipset for this new CPU, is using two Rambus channels and therefore the expensive and unpopular RDRAM. However, these two RDRAM channels are able to deliver the same data bandwidth as Pentium 4's new bus (3,200 MB/s), making them a perfect match at least on paper. This constellation enables Pentium 4-systems to have the highest data transfer rates between processor, system and main memory, which is a clear benefit. At the same time system cost is impacted by the high price of RDRAM plus the fact that a Pentium 4-system always requires two or even four RDRAM-RIMMs of the same size and spec. One, three or mixed RIMMs are not an option.