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HOT! Update Of Intel Roadmap News!

Intel Roadmap News 10/2000 - Part Two, Intel's Future Mobile and Server/Workstation Products

Intel Roadmap News 10/2000 - Part One, Desktop Processors And Chipsets

AMD vs. Intel: The best CPU for MPEG-4.

DDR-SDRAM Has Finally Arrived

AMD Extends Performance Lead With New Athlon and Duron Processor

Intel i820 Chipset Review

Intel's New Weapon - The Coppermine

Tom's Blurb - All Owners of Systems With Intel's i820 Chipset That Don't Use RDRAM Yet Will Now Get It For Free From Intel!

Tom's Blurb: Why We Don't Trust Rambus - Pointing Out Facts, Turning Rumors Into Reality

Intel Admits Problems With Pentium III 1.13 GHz - Production and Shipments Halted

Important Pentium 4 Evaluation Update

Rambler's Top100 Рейтинг@Mail.ru

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Intel
Краткое содержание статьи: Equipped with an exciting brand new design Intel's new flagship is getting ready to step out into the open. Get ready for the most controversial x86-processor of all times. Find out if you are the working class kind of guy with Athlon-ambitions or rather the stylish Yuppie that needs Pentium 4 even if it's only to be cool. Here it comes, the battle style against power.

Intel's New Pentium 4 Processor


Редакция THG,  20 ноября 2000
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Advanced Transfer Cache


Intel Pentium 4 Advanced L2 Cache

The next thing that (most of) the data has to pass is Pentium 4's on-die L2-cache. Intel calls it 'Advanced Transfer Cache' since the days of Pentium III 'Coppermine'. With 256 KB its size is identical to the L2-cache of Pentium III and both are 8-way associative as well. This is however where the similarities end. Pentium 4's L2-cache is using 128-byte cache lines, which are divided in two 64-byte pieces. When it fetches data from the system (main memory, AGP, PCI, ...) it reads at least 64 bytes in one go, which ensures great performace for burst transfers, especially when talking to RDRAM, but is rather bad if only one byte out of that 64 is actually required. The same is obviously valid for write operations in case the cache line has become 'dirty', meaning that the cache data has been altered and therefore needs to be written back to the system (memory, AGP, PCI, ...). The read latency of Pentium 4's L2-cache is 7 clocks, its connection to the core is 256-bit wide and obviously clocked at core clock. After doing the math we get to an impressive data bandwidth between L2-cache and core of 44.8 GB/s for Pentium 4 @ 1.4 GHz and 48 GB/s for Pentium 4 at 1.5 GHz.

Pentium 4's L1 Cache

After the discussion of the L2 cache it wouldn't be more than logical to move over to the L1 cache. This is what we will do, but not without a special remark. While Pentium III is equipped with a 16 KB L1 cache for instructions and a 16 KB L1 cache for data, there is only an 8 KB small data L1 cache in Pentium 4, while a pretty nifty feature called 'Execution Trace Cache', which I'll discuss in the next paragraph, replaces the L1 instruction cache of Pentium III.

Intel was probably forced to reduce the size of the L1 data cache down to only 8 KB, which is half the size of Pentium III's L1 data cache and only an eighth (!!!) of Athlon's, to enable its extremely low latency of only 2 clock cycles. It results in an overall read latency of less than half of Pentium III's L1 data cache already in the Pentium 4 at 1.4 GHz, but the small size of Pentium 4's L1 data cache may be one reason for the performance flaws we will see when we get to the benchmark results.

The L1 data cache of Pentium 4 is 4-way set associative and uses 64-byte cache-lines. The dual-port architecture allows one load and one store operation per clock.
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Обсуждение в Клубе Экспертов THG Обсуждение в Клубе Экспертов THG


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